ASIC Design Engineer Responsibilities (Remote) – Job Order 3220
Very experienced only.
H-1B sponsorship available
Remote, HQ in the Philadelphia, PA area
My client is a technology leader delivering high-performance fabrics for High Performance Computing (HPC), High Performance Data Analytics (HPDA), and Artificial Intelligence (AI) for the purpose of delivering interconnect solutions that enable their customers to optimally apply vast computational resources to solve the world’s toughest problems.
End-to-end SoC/ASIC development:
Front-end standard cell ASIC development including RTL development, Design Verification, synthesis, and post-silicon validation.
Cross-functional collaboration and partnering with internal and external cross-functional teams, across all levels of the corporation.
Define, implement, debug, and deliver system solutions around purpose-built ASICs.
B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
Experience in digital design with one or more HDL language (System Verilog, Verilog, VHDL)
proficient in one or more scripting language (TCL, Python, Perl)
Understanding of Standard Cell ASIC development flow including digital design, IP integration, simulation and synthesis.
2+ years of silicon development experience
Track record of first-pass success in ASIC and Systems
Experience with multiple clock designs and asynchronous interfaces
My client fully supports remote employees who are able to travel to our offices (when safe) periodically for in-person collaboration.
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