Digital Design Research Scientist – Job Order 3353

Digital Design Research Scientist – Job Order 3353

Northern VA near Washington DC
Must be a US citizen
$148,000 to $180,000

Research Computer Scientist – Digital Design
Arlington, Virginia

We are looking for highly talented, motivated technical leaders to join our team. This position will lead research and propose major innovations in domain specific computing targeting ASICs and FPGAs. Research and develop high speed, compact on-chip communication and switching mechanisms that scale to full device solutions. Collaborate with team members developing custom EDA tools to perform design space exploration of custom architectures across unique performance parameters. Be an active member of a fast-paced ASIC Development team supporting the full life cycle from functional architecture definition to physical implementation, verification, and tape-out. The successful candidate will also collaborate with peers within the group and across ISI; publish results in top tier conferences; and contribute to and lead proposals efforts.

QUALIFICATIONS:

PhD or MS and equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science required.
Previous publications, patents, or innovations related to digital design, computer architecture, on-chip networking, EDA for digital design, or novel application mapping.
Five years of digital design experience using Synopsys or Cadence CAD tools and commercial/academic cad flows.
Five years of Hardware Description Language (Verilog, VHDL, or SystemVerilog) and Python development experience.
Ability to evaluate, apply, and mature published research to real-world problems at scale on prototype systems.
Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. Citizenship.

Preferred Job Qualifications:

Three years of experience with hardware/software co-design and design space exploration with heterogenous computing architectures.
Successful tape out experience on modern foundry nodes (<=12nm) a significant plus.
Prior experience using digital logic verification tools such as Synopsys Formality, Cadence Conformal, or Synopsys VC Formal
Prior experiences developing and/or verifying wireless or digital signal processing systems.
The annual base salary range for this position is $148,701 – $180,000.