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FPGA Senior Design Engineer, Digital Hardware – Job Order 3296

FPGA Senior Design Engineer, Digital Hardware – Job Order 3296

Bernardsville, NJ 07924 with some remote
US citizenship required; clearance is NOT required
$72K to $170K+

They are more than a research lab; they are an innovation hub. They have an entreprenurial spirit molding technology of the future. They are involved in cybersecurity, data analytics, advanced networking, wireless and mobility, display technologies, optical and quantum, power grid and IoT security, and electronic warfare. The industries they work in include smart cities and smart phones, intelligent battlefields and autonomous systems, telecommunications, energy, finance, government, life sciences and defense. They have 225 scientists, engineers and analysts on staff, 260+ issued, licensed and pending patents. They have more than 125 PhD’s on staff, 40+ collaborations with universities, research organizations and vendors. Additionally they have 100+ on-going customer-funded research and technology programs.

My client is looking for an experienced FPGA engineer targeting Xilinx Zynq MPSoC devices for a full-time position in the Cyber Security group. The selected candidate will work on exciting programs, including building an innovative security device that mitigates mission-critical security vulnerabilities by filtering data bus communications in real-time, with less than 1 micro-second latency.


Requires 10 to 12 years with BS/BA or 8 to 10 years with MS/MA or 5 to 7 years with PhD.

7+ years HDL hand coding experience for industrial / military applications
Work cooperatively with systems, hardware, software engineers and program management to ensure product success
Ability to progress the design or suggest options when direction is unclear
Support code reviews
End-to-end FPGA design and implementation experience: from analog hardware interaction to software system interaction
Strong understanding of synchronous design practices and data flow management (FIFOs, memories, pipelining) implemented largely with hand-coding techniques
Designing for performance, hand instantiating Xilinx Parameterized Macros, coding to match hardware present inside the target device, such as native memory width
Understanding of multiple implementations to determine which requires the least resources while meeting requirements
Partition system requirements and decide in which subsystem a feature is best implemented
Expert with Xilinx Vivado tool flows hosted in a Linux environment
Expert with Xilinx FPGAs and SoCs, with focus on Zynq-UltraScale+ MPSoC and internal resources of the FPGA fabric
Translate system-level requirements into FPGA requirements
Subsystem test and bring-up using sufficient stimulation to cover corner cases before passing design on to verification team
Expert knowledge of language features of VHDL/Verilog/SystemVerilog (at least one)
Create and maintain high level, and low-level documentation in accordance with quality requirements
Proven ability to troubleshoot and use test equipment including but not limited to oscilloscope, logic analyzer, spectrum analyzer, JTAG debuggers
US Citizenship Required
Other Relevant Skills (not required, but any are a plus):

Experience with DO-254 and DO-178 certification
Avionics domain experience
New board bringup, debugging, and validating experience
Embedded systems design using ARM, MicroBlaze, or Nios processors
Knowledge of C programming and scripting languages such as Perl or Python, Tcl
Gigabit serial interfaces and multi-gigabit transceivers (MGT’s)
Familiarity with I2C, SPI, PCIe, Ethernet, USB, DDR3/4, and various standard IP cores
Familiarity with PetaLinux
Past experience estimating design work, developing schedules, and tracking progress against budget and schedule for FPGA designs
Experience with Vivado HLS

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