ASIC Design Engineer – Job Order 3161
Arlington, VA, Boston, MA or Los Angeles, CA
Compensation: up to $120K
0 – 5 years of experience
US citizens or permanent resident
My client, a technology research organization, is looking for highly talented, motivated researchers to lead and impact state of the art research and development in the area of reconfigurable computing. This position will lead research in algorithm development for custom internal tools which target FPGA and ASIC front end design. These tools solve challenging problems in hardware security, high level abstraction for hardware design, and machine learning acceleration for critical systems. Realize effectiveness of solutions on physical FPGAs and custom ASIC fabrication. Lead research, propose major innovations, collaborate with peers within the group and across the company, publish results in top tier conferences, and contribute to or lead proposals.
” Graduate degree or equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science required.
” Solid understanding of VHDL, Verilog, or SystemVerilog.
” Knowledge of ASIC architecture and device primitives demonstrated through mapping applications using Synopsys Design Compiler or IC Compiler, Cadence Genus or Innovus.
” Strong experience with testbench generation and functional verification of FPGA designs.
” Applicants selected for this position will require access to Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. citizenship or U.S. permanent residency.
Preferred Job Qualifications:
” Experience using C/C++, Python, TCL and/or Java in a digital EDA or embedded software environment a plus.
” Familiarity with any open-source EDA tools such as Verilator, ABC, VTR or VPR, Yosys, SymbiFlow, OpenROAD, Jove, or TORC a plus.
” Experience with software revision control systems such as Git, Mercurial, SVN, etc.