FPGA Design Engineer, Hybrid – Job Order 3222
On-site work in Malvern, PA, some remote
$150K+, market value, stock options
My client is a technology leader delivering high-performance fabrics for High Performance Computing (HPC), High Performance Data Analytics (HPDA), and Artificial Intelligence (AI) for the purpose of delivering interconnect solutions that enable their customers to optimally apply vast computational resources to solve the world’s toughest problems.
Key Tasks include:
Support the parallel development and validation of high-performance computing ASICs through the targeting of the ASIC’s IP/RTL to an FPGA-based acceleration platform.
Replace ASIC-specific IP that cannot be targeted to an FPGA, with FPGA-specific IP for the same purpose, by developing integration (shim) wrappers that closely model the ASIC IP.
Support the parallel verification of the ASIC RTL by supplementing the verification environments created for silicon validation.
Provide support for firmware and software development on the FPGA platform by working with cross-functional teams to implement and debug the combined software and hardware solution.
Perform scaled-performance testing and error-case analysis.
Contribute ideas, solutions, bug-fixes, and possible architectural improvements to the designs being implemented.
Create complex compute-intensive lab scenarios to closely model scaled-down customer deployment environments.
Selection of project appropriate FPGA platform.
Participate in design reviews and recommend improvements.
B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
Experience in digital design with one or more HDL languages that must include either System Verilog or Verilog.
Proficient in one or more scripting languages (TCL, Python, Perl)
Deep understanding of FPGA development flows including digital design, IP integration, simulation and synthesis.
5+ years of FPGA development experience.
Track record of success in FPGA Development.
Prior experience evaluating and selecting FPGA platforms.
Strong understanding of FPGA design and architectural concepts as well as their integration with both hardware and software.
Strong understanding of tools and methodologies used in the context of FPGA development and integration. Familiarity with version control methodologies via established systems such as Git is a plus.
Specific experience with common FPGA acceleration platforms.
Experience bringing-up and debugging complex logic implementations.
Experience with multiple clock designs and asynchronous interfaces.
Experience working with both hardware and software designers.
Experience with embedded processors.
Demonstrated skill in independently using electronics lab equipment to develop/troubleshoot low-level drivers and hardware integration for interfaces such as I2C, SPI, UART, USB, PCIe, High-Speed SerDes, etc.