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Senior Analog Design & Layout Engineer (Microelectronics Commons) – Job Order 3529

Senior Analog Design & Layout Engineer (Microelectronic Commons) – Job Order 3529

Location: Los Angeles, CA

US citizenship or Permanent Residency required

$157K to $180K

The Opportunity

We are seeking a versatile Analog Design and Layout Engineer to join a premier microelectronics hub. This role is unique: you will function as a technical consultant for external customers, a mentor for advanced circuit design courses, and a key contributor to funded research. If you enjoy the intersection of hands-on physical layout and academic innovation-moving from schematic capture to tape-out across diverse process technologies-this is your ideal environment.

Key Responsibilities
” Technical Consulting & Design Support: Partner with external customers to develop high-performance analog or digital circuit designs. You will provide expert guidance on schematic capture, simulation, and layout implementation.

” Multi-Process Expertise: Navigate and implement designs across a variety of technologies, including CMOS, BiCMOS, and III-V, ensuring strict compliance with foundry design rules

” Academic & Research Integration: Support specialized “tape-out” curriculum by demonstrating advanced layout techniques and troubleshooting design-flow bottlenecks for students.

” Full Lifecycle Verification: Lead efforts in post-layout simulation, parasitic extraction, and layout verification (DRC/LVS) for high-impact research projects.

” Collaborative Documentation: Author technical design reports and layout closure documentation for both industry partners and academic stakeholders.

Required Qualifications

” Education: Bachelor’s, Master’s, or PhD in Electrical Engineering or a related technical field.

” Experience: Minimum 3+ years of professional experience in analog circuit design and/or physical layout.

” Tooling: Mastery of industry-standard CAD environments (e.g., Cadence Virtuoso, SPICE simulators, or Mentor Graphics).

” Verification: Deep understanding of layout verification methodologies and parasitic extraction.

” Communication: Exceptional interpersonal skills; ability to translate complex technical concepts for both customers and students.

Preferred Skills

” Experience with device-level, electromagnetic, or photonic component simulations.

” Prior experience in a teaching, tutoring, or workshop-led environment.

 

 

To apply for this job email your details to paulreino@accuritstaffing.com

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